Regviz

Cypress Semiconductor /psoc63 /BLE /RCB /TX_FIFO_STATUS

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TX_FIFO_STATUS

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Cypress Semiconductor/psoc63/BLE/RCB/TX_FIFO_STATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0USED0 (SR_VALID)SR_VALID 0RD_PTR0WR_PTR

Description

Transmitter FIFO status register.

Fields

USED

Amount of enties in the transmitter FIFO. The value of this field ranges from 0 to 16
SR_VALID

Indicates whether the TX shift registers holds a valid data frame (‘1’) or not (‘0’). The shift register can be considered the top of the TX FIFO (the data frame is not included in the USED field of the TX FIFO). The shift register is a working register and holds the data frame that is currently transmitted (when the protocol state machine is transmitting a data frame) or the data frame that is tranmitted next (when the protocol state machine is not transmitting a data frame).
RD_PTR

FIFO read pointer: FIFO location from which a data frame is read by the hardware.
WR_PTR

FIFO write pointer: FIFO location at which a new data frame is written.

Links

()

Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data